Direct memory access (dma) unit with address alignment

A method for operating a direct memory access (DMA) system, the method comprising:

• configuring a bandwidth control setting for a first read job, the bandwidth control setting including a data transfer size corresponding to a first number of bytes;
• determining, by a read data engine, a second number of bytes, the second number of bytes to reach a read address alignment for the first read job;
• using the read data engine to transfer a third number of bytes to a data buffer, the third number of bytes substantially equal to the first number of bytes plus the second number of bytes;
• after transferring the third number of bytes, using the read data engine to transfer the first number of bytes to the data buffer;
• iteratively repeating the step of using the read data engine to transfer the first number of bytes to the data buffer until all bytes of the read job are transferred to the data buffer;
• and
• using a write data engine to transfer a fourth number of bytes from the data buffer to a destination.

A direct memory access (DMA) system comprising:

• a control circuit including a bandwidth control configuration for a first read job, the bandwidth control configuration having a data transfer size corresponding to a first number of bytes;
• a read data engine coupled to the control circuit and to a data buffer, the read data engine operable to:
• determine a second number of bytes, the second number of bytes to reach a read address alignment for the first read job;
• transfer a third number of bytes to a data buffer, the third number of bytes substantially equal to the first number of bytes plus the second number of bytes;
• after transferring the third number of bytes, transfer the first number of bytes to the data buffer;
• and
• iteratively repeat the step of transferring the first number of bytes to the data buffer until all bytes of the read job are transferred to the data buffer;
• a write data engine coupled to the control circuit and to the data buffer, the write data engine operable to transfer a fourth number of bytes from the data buffer to a destination.