Programmable memory-side cache management
AssigneeHewlett Packard Enterprise Development LP
InventorsQiong Cai, Paolo Faraboschi
Life of this patent
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Abstract
Examples disclosed herein relate to programmable memory-side cache management. Some examples disclosed herein may include a programmable memory-side cache and a programmable memory-side cache controller. The programmable memory-side cache may locally store data of a system memory. The programmable memory-side cache controller may include programmable processing cores, each of the programmable processing cores configurable by cache configuration codes to manage the programmable memory-side cache for different applications.
Claims15
A system, comprising:
- a programmable memory-side cache to locally store data of a system memory;
- and
- a programmable memory-side cache controller including programmable processing cores, each of the programmable processing cores configurable by cache configuration codes to manage the programmable memory-side cache for different applications.
A method for memory-side cache management, the method performed by a processing system and comprising:
- generating cache configuration codes for configuring programmable processing cores of a programmable memory-side cache controller to manage a programmable memory-side cache for different applications;
- identifying a cache configuration code identifier associated with a memory transaction;
- determining a cache configuration code corresponding to the identified cache configuration code identifier among the generated cache configuration codes;
- and
- configuring at least one programmable processing core of the programmable memory-side cache controller to manage the programmable memory-side cache using the determined cache configuration code.
A system, comprising:
- a system memory including a plurality of memory regions, cache configuration codes being assigned to different memory regions;
- a programmable memory-side cache controller including programmable processing cores;
- and
- a processing system to, in response to a memory transaction associated with a memory region among the plurality of memory regions, configure a programmable processing core of the programmable memory-side cache controller to manage a programmable memory-side cache using the cache configuration code assigned to the memory region.
Dependencies are inferred from the claim text.