Accessing physical memory from a cpu or processing element in a high perfomance manner
AssigneeIntel Corporation
InventorsSanjoy K. MONDAL, Rajesh B. PATEL, Lawrence O. SMITH
Life of this patent
Estimating the term…
Abstract
A method and apparatus is described herein for accessing a physical memory location referenced by a physical address with a processor. The processor fetches/receives instructions with references to virtual memory addresses and/or references to physical addresses. Translation logic translates the virtual memory addresses to physical addresses and provides the physical addresses to a common interface. Physical addressing logic decodes references to physical addresses and provides the physical addresses to a common interface based on a memory type stored by the physical addressing logic.
Claims9
A method comprising:
- receiving a first instruction with a microprocessor to read a first element from a first virtual memory address in a virtual memory, wherein the first instruction is generated by a first virtual machine;
- translating the first virtual memory address to a first physical address;
- fetching the first element from a first location referenced by the first physical address;
- receiving a second instruction with the microprocessor to store a second element at a second physical address, wherein the second instruction is generated by a second virtual machine;
- and
- storing the second element in a second location referenced by the second physical address without disabling paging of the virtual memory.
Dependencies are inferred from the claim text.