Cribbing cache implementing highly compressible data indication
AssigneeIntel Corporation
InventorDaniel GREENSPAN
Life of this patent
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AssigneeIntel Corporation
InventorDaniel GREENSPAN
Estimating the term…
A memory subsystem includes a flag to indicate high compressibility, which enables a cache controller to selectively avoid access to the data from a memory resource based on an indication of the flag. The main memory device stores data and the auxiliary memory device stores a copy of the data. The cache controller can determine whether the memory location includes highly compressible data and store a flag locally at the cache controller as a representation for high compressibility. The flag is accessible without external input/output (I/O) from the cache controller, and indicates whether the data includes highly compressible data. The flag can optionally indicate a type of highly compressible data. In response to a memory access request for the memory location, the cache controller can return fulfillment of the memory access request according to the representation of high compressibility indicated by the flag.
A system, comprising:
A method for data access, comprising:
Dependencies are inferred from the claim text.