Error correction code event detection
AssigneeMicron Technology, Inc.
InventorsYihua Zhang, Paolo E. Mangalindan, Jianfei Lei, Andrew D. Proescholdt, Gerard A. Kreifels
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Abstract
Methods, systems, and devices for operating a memory cell or cells are described. An error in stored data may be detected by an error correction code (ECC) operation during sensing of the memory cells used to store the data. The error may be indicated in hardware by generating a measurable signal on an output node. For example, the voltage at the output node may be changed from a first value to a second value. A device monitoring the output node may determine an error has occurred for a set of data based at least in part on the change in the signal at the output node.
Claims25
A method of operating an electronic memory apparatus, comprising:
- identifying a codeword from a read operation of the electronic memory apparatus;
- detecting an error in the codeword based at least in part on an error correction code (ECC) operation associated with the codeword;
- and
- transmitting a signal indicative of the error detection to a node of the electronic memory apparatus.
A method of operating an electronic memory apparatus, comprising:
- sensing a state of each cell of a set of memory cells of the electronic memory apparatus;
- detecting an error associated with the sensed states of the set of memory cells;
- changing a voltage of a node of the electronic memory apparatus from a first value to a second value in response to the error detection;
- and
- indicating that the error has been detected based at least in part on changing the voltage of the node.
An electronic memory apparatus, comprising:
- a memory array comprising a plurality of memory cells;
- an error correction code (ECC) array in electronic communication with the memory array;
- a latch in electronic communication with the ECC array and operable to change an output state based at least in part on a read operation of the ECC array;
- and
- an output pin in electronic communication with the latch, wherein a voltage measurable at the output pin is based at least in part on the output state of the latch.
Dependencies are inferred from the claim text.