Indirect branch prediction

An indirect branch predictor logic unit to update an indirect branch predicted target table used by a processor, the indirect branch predictor logic unit comprising:

• an indirect branch predicted target table configured to store a plurality of predicted target addresses for indirect branch instructions;
• an update logic unit in communication with the indirect branch predicted target table, the update logic unit configured to:
• receive information related to an executed indirect branch instruction, the information related to the executed indirect branch instruction comprising an actual target address for the executed indirect branch instruction;
• obtain a committed indirect path history and a committed taken and not-taken history, the committed indirect path history comprising at least a portion of actual target addresses for a plurality of previously executed indirect branch instructions, the committed taken and not-taken history comprising outcomes for a plurality of previously executed conditional branch instructions;
• combine the committed indirect path history and the committed taken and not-taken history to generate an index for the executed indirect branch instruction;
• identify a predicted target address of the indirect branch predicted target table using the index for the executed indirect branch instruction;
• and
• replace the predicted target address identified by the index for the executed indirect branch instruction with the actual target address for the executed indirect branch instruction.

A non-transitory computer readable storage medium having stored thereon computer readable program code for generating a processor comprising an indirect branch predictor logic unit to update an indirect branch predicted target table used by the processor, the indirect branch predictor logic unit comprising:

• an indirect branch predicted target table configured to store a plurality of predicted target addresses for indirect branch instructions;
• an update logic unit in communication with the indirect branch predicted target table, the update logic unit configured to:
• receive information related to an executed indirect branch instruction, the information related to the executed indirect branch instruction comprising an actual target address for the executed indirect branch instruction;
• obtain a committed indirect path history and a committed taken and not-taken history, the committed indirect path history comprising at least a portion of actual target addresses for a plurality of previously executed indirect branch instructions, the committed taken and not-taken history comprising outcomes for a plurality of previously executed conditional branch instructions;
• combine the committed indirect path history and the committed taken and not-taken history to generate an index for the executed indirect branch instruction;
• identify a predicted target address of the indirect branch predicted target table using the index for the executed indirect branch instruction;
• and
• replace the predicted target address identified by the index for the executed indirect branch instruction with the actual target address for the executed indirect branch instruction.