Administering instruction tags in a computer processor

A computer processor for administering instruction tags (ITAGs), the processor configured to carry out:

• for each instruction when the computer processor is in a single-thread mode of operation:
• incrementing a value of a wrap around counter;
• setting a wrap bit to a predefined value if incrementing the value of the wrap around counter causes the counter to wrap around;
• generating, in dependence upon the counter value and the wrap bit, an ITAG for the instruction, the ITAG comprising a bit string, the bit string comprising the wrap bit and an index, the index comprising the counter value;
• and
• for each instruction when the computer processor is in a multi-thread mode of operation:
• incrementing the value of the wrap around counter;
• setting a wrap bit to a predefined value if incrementing the value of the wrap around counter causes the counter to wrap around;
• and
• generating, in dependence upon the counter value and the wrap bit, an ITAG for the instruction, the ITAG comprising a bit string, the bit string comprising the wrap bit, a thread identifier, and an index, the index comprising the counter value.

An apparatus for administering instruction TAGs (ITAGS), the apparatus comprising a computer processor and a computer memory operatively coupled to the computer processor, the computer processor configured to carry out:

• for each instruction when the computer processor is in a single-thread mode of operation:
• incrementing a value of a wrap around counter;
• setting a wrap bit to a predefined value if incrementing the value of the wrap around counter causes the counter to wrap around;
• generating, in dependence upon the counter value and the wrap bit, an ITAG for the instruction, the ITAG comprising a bit string, the bit string comprising the wrap bit and an index, the index comprising the counter value;
• and
• for each instruction when the computer processor is in a multi-thread mode of operation:
• incrementing the value of the wrap around counter;
• setting a wrap bit to a predefined value if incrementing the value of the wrap around counter causes the counter to wrap around;
• and
• generating, in dependence upon the counter value and the wrap bit, an ITAG for the instruction, the ITAG comprising a bit string, the bit string comprising the wrap bit, a thread identifier, and an index, the index comprising the counter value.