Interprocessor power state transitions

An apparatus comprising:

• a modem comprising:
• a communications processor;
• and
• link state logic executable by the communications processor to:
• enter a particular low power link state associated with a link to couple the communications processor to an application processor of a host device, wherein the particular low power link state is a lower powered one of a plurality of low power link states available for the link;
• identify an exit from the particular low power link state;
• access, from local memory of the modem, configuration data to provide to the host device during the exit, wherein the configuration data is provided to the host device for use in lieu of a reconfiguration performed by host software during the exit from the particular low power device state.

A system comprising:

• a host device comprising:
• an application processor;
• and
• a modem to couple the host device to a wireless data network, wherein the modem is coupled to the application processor by a link and the modem further comprises:
• a communications processor;
• and
• power management logic executable by the communications processor to:
• identify an idle condition associated with the data network;
• determine that a first low power device state should be entered based on the idle condition, wherein the first low power device state is a low powered one of a plurality of available low power device states;
• and
• send a notification to an application processor of the host device that the modem is to enter a sleep state associated with the idle condition, wherein the notification comprises a hint for the link to enter a particular link state associated with the first low power device state, and the sleep state is independent of the plurality of low power device states;
• and
• link state logic executable by the communications processor to enter the particular low power link state corresponding to the first low power device state based on a signal from the application processor.