Memory system
AssigneeToshiba Memory Corporation
InventorNaoki KIMURA
Life of this patent
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Abstract
According to one embodiment, a memory system includes a volatile memory, a power supply circuit, and a controller. The power supply circuit includes a first power supply path in which power supplied from a host device is supplied to the volatile memory, a second power supply path in which the power is supplied from the internal power supply to the volatile memory, and a switching device that switches between the first power supply path and the second power supply path. In response to an instruction for a transition to a low power consumption mode received from the host device, the controller outputs, to the switching device, an instruction to switch the power supply circuit from the first power supply path to the second power supply path.
Claims20
1-20. (canceled)
A memory system comprising:
- a non-volatile memory;
- a volatile memory that temporarily stores data to be written into the non-volatile memory;
- an internal power supply:
- a controller that includes a first control circuit and a second control circuit;
- and
- a power supply circuit that includes a first power supply circuit, a second power supply circuit, and a third power supply circuit, the first power supply circuit supplying a power supplied from a host device to the first control circuit, the second power supply circuit controlling on/off of power supply from the host device to the second control circuit and the non-volatile memory, the third power supply circuit supplying either the power supplied from the host or a power supplied from the internal power supply to the volatile memory;
- wherein,
- when receiving an instruction for a transition from a normal mode to a low power consumption mode from the host device, the first control circuit controls the second and third power supply circuits so that the power supply from the host device to the second control circuit, the non-volatile memory, and the volatile memory is turned from on to off, and the power supply from the internal power supply to the volatile memory is turned from off to on.
The memory system according to claim 33, wherein the first power supply circuit supplies either the power supplied from the host or the power supplied from the internal power supply to the first control circuit,
- wherein, when the power supplied from the host is cut off during the low power consumption mode, the first control circuit controls the first, second, and third power supply circuits so that the power supply from the host device to the first control circuit is turned from on to off, the power supply from the host device to the second control circuit, the non-volatile memory, and the volatile memory is maintained in off, and the power supply from the internal power supply to the volatile memory is maintained in on.
Dependencies are inferred from the claim text.