Substrate for semiconductor device and semiconductor device using the same

A method for manufacturing a substrate for a semiconductor device comprising:

• providing a supporting base plate made of ceramics and formed by a polycrystalline aluminum nitride (AlN) sintered bulk body;
• performing a sol-gel process to form a silicon oxide layer at least one time wherein the sol-gel process is performed 1˜10 times, the average roughness of the top layer of the at least one silicon oxide layer is less than 25 nm and the at least one silicon oxide layer has a total thickness in a range of 10˜5000 nm;
• using a metal-organic chemical vapor deposition method to form a first buffer layer which comprises aluminum nitride (AlN) formed on the at least one silicon oxide layer;
• and
• using a metal-organic chemical vapor deposition method to form a gallium nitride layer formed on the first buffer layer and having a single-crystal crystalline structure.

A semiconductor device, comprising:

• a supporting base plate, made of ceramics and formed by a polycrystalline aluminum nitride (AlN) sintered bulk body;
• at least one silicon oxide layer, formed on the base plate by a sol-gel method wherein the at least one silicon oxide layer has an average roughness less than that of the base plate to block polycrystalline orientation of the base plate and has a total thickness in a range of 10˜5000 nm, the silicon oxide layers are only formed from the sol-gel method and are not single crystalline;
• a first buffer layer, formed on the at least one silicon oxide layer wherein the first buffer layer is of aluminum nitride (AlN) and has a thickness of 10˜50000 nm and a preferred orientation (002) AlN crystalline structure;
• a gallium nitride layer, formed on the first buffer layer and having a single-crystal crystalline structure;
• a light emitting layer on the gallium nitride layer, wherein the light emitting layer is a n-type layer and has a single-crystal crystalline structure;
• and
• a p-type layer on the light emitting layer.

An insulated gate bipolar transistor, comprising:

• a supporting base plate, made of ceramics and formed by a polycrystalline aluminum nitride (AlN) sintered bulk body;
• at least one silicon oxide layer, formed on the base plate by a sol-gel method wherein the at least one silicon oxide layer has an average roughness less than that of the base plate to block polycrystalline orientation of the base plate and has a total thickness in a range of 10˜5000 nm, the silicon oxide layers are only formed from the sol-gel method and are not single crystalline;
• a first buffer layer, formed on the at least one silicon oxide layer wherein the first buffer layer is of aluminum nitride (AlN) and has a thickness of 10˜50000 nm and a preferred orientation (002) AlN crystalline structure;
• an n-type layer, formed on the first buffer layer;
• an insulated gate bipolar transistor structure, formed on the n-type layer;
• and
• electrodes, formed on the insulated gate bipolar structure.