Asymmetric fet

A method of forming a semiconductor structure comprising:

• forming a first-side trench on a first side of a gate structure and a second-side trench on a second side of the gate structure opposite to the first side by recessing portions of a semiconductor portion located on a substrate;
• forming a first-side epitaxial semiconductor region in the first-side trench and a second-side epitaxial semiconductor region in the second-side trench, wherein the first-side epitaxial semiconductor region and the second-side epitaxial semiconductor region comprise first dopants of a first conductivity type;
• forming at least one dielectric layer over the first-side epitaxial semiconductor region, the second-side epitaxial semiconductor region and the gate structure;
• forming a second-side contact opening through the at least one dielectric layer to expose an entire top surface of the second-side epitaxial semiconductor region while the first-side epitaxial semiconductor region remains covered by the at least one dielectric layer;
• and
• introducing second dopants into the second-side epitaxial semiconductor region and a portion of the semiconductor portion surrounding the second-side epitaxial semiconductor region to form a dopant region within the semiconductor portion.