Semiconductor device and manufacturing method thereof
AssigneeRenesas Electronics Corporation
InventorHiroki SHINKAWATA
Life of this patent
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Abstract
In an SOI substrate having a semiconductor substrate serving as a support substrate, an insulating layer on the semiconductor substrate and a semiconductor layer on the insulating layer, an element isolation region which penetrates the semiconductor layer and the insulating layer and whose bottom part reaches the semiconductor substrate is formed, and a gate electrode is formed on the semiconductor layer via a gate insulating film. A divot is formed in the element isolation region at a position adjacent to the semiconductor layer, and a buried insulating film is formed in the divot. The gate electrode includes a part formed on the semiconductor layer via the gate insulating film, a part located on the buried insulating film and a part located on the element isolation region.
Claims20
A semiconductor device having a MISFET, comprising:
- a substrate having a support substrate, an insulating layer on the support substrate and a semiconductor layer on the insulating layer;
- an element isolation region which is formed in the substrate and penetrates the semiconductor layer and the insulating layer, and whose bottom part reaches the support substrate;
- and
- a gate electrode for the MISFET formed on the semiconductor layer via a gate insulating film,
- wherein a hollow part is formed in the element isolation region at a position adjacent to the semiconductor layer and a buried insulating film is formed in the hollow part, and
- wherein the gate electrode includes a part formed on the semiconductor layer via the gate insulating film, a part located on the buried insulating film and apart located on the element isolation region.
A manufacturing method of a semiconductor device, comprising the steps of:
- (a) preparing a substrate having a semiconductor substrate, an insulating layer on the semiconductor substrate, a semiconductor layer on the insulating layer, a first insulating film on the semiconductor layer, a trench penetrating the first insulating film, the semiconductor layer and the insulating layer to reach the semiconductor substrate, and an element isolation region buried in the trench;
- (b) after the step (a), removing the first insulating film by etching, thereby exposing the semiconductor layer;
- (c) after the step (b), forming a gate insulating film on a surface of the semiconductor layer;
- and
- (d) after the step (c), forming a gate electrode on the semiconductor layer via the gate insulating film,
- wherein the step (c) is performed in a state where a hollow part is formed in the element isolation region at a position adjacent to the semiconductor layer and a buried insulating film is formed inside the hollow part,
- the manufacturing method further comprising, after the step (b) and before the step (c), the steps of:
- (c1) forming a second insulating film for forming the buried insulating film on the element isolation region and the semiconductor layer including the inside of the hollow part;
- and
- (c2) removing the second insulating film outside the hollow part so as to leave the second insulating film in the hollow part, thereby forming the buried insulating film.
Dependencies are inferred from the claim text.