Stacked silicon package assembly having conformal lid
AssigneeXilinx, Inc.
InventorJaspreet Singh Gandhi
Life of this patent
Estimating the term…
Abstract
A chip package assembly and method for fabricating the same are provided which utilize a conformal lid to improve the chip package assembly from deformation. In one example, a chip package assembly is provided that includes integrated circuit (IC) dies, a packaging substrate, and a lid. The packaging substrate has a die receiving area that is defined by the laterally outermost extents of the IC dies mounted to the packaging substrate. The lid a surface that includes a first region and a second region. The first region is disposed over the first IC die while the second region of the lid extends below the second surface the first IC die and is spaced above the packaging substrate. At least a portion of the second region of the lid is overlapped with the die receiving area.
Claims20
A chip package assembly comprising:
- a first integrated circuit (IC) die;
- a second IC die, each of the first and second IC die has a first surface and a second surface that faces way from the first surface;
- a packaging substrate having a first surface and a second surface, the first surface of the packaging substrate facing the second surface of the IC dies and having a die receiving area surrounded by a ring shaped boundary area, the die receiving area defined by the laterally outermost extents of the IC dies mounted to the first surface of the packaging substrate;
- and
- a lid having a first surface and a second surface facing away from the first surface, the second surface of the lid having a first region and a second region, the first region disposed over the first IC die, the second region of the lid extending below the first surface the first IC die and spaced above the first surface of the packaging substrate, wherein at least a portion of the second region of the lid is overlapped with the die receiving area.
A chip package assembly comprising:
- a first integrated circuit (IC) die;
- a second IC die, each of the first and second IC dies having a first surface and a second surface that faces way from the first surface;
- a package substrate;
- an interposer having a first surface and a second surface, the second surface of the interposer coupled to the package substrate, the first surface of the interposer having the first IC die and second IC die mounted thereto, the first surface of the interposer having a die receiving area surrounded by a ring shaped border, the die receiving area defined by the laterally outermost extents of the IC dies mounted to the first surface of the interposer;
- and
- a lid having a first surface and a second surface facing away from the first surface, the second surface of the lid having a first region, a second region and a mounting region, the first region disposed over the first IC die, the second region of the lid extending below the first surface the first IC die and spaced above the first surface of the interposer, at least a portion of the second region of the lid overlapped with the die receiving area, the mounting region circumscribing the first and second regions and structurally connected to the first surface of the package substrate.
A chip package assembly comprising:
- a plurality of integrated circuit (IC) dies each having a first surface and a second surface that faces way from the first surface;
- a package substrate;
- an interposer having a first surface and a second surface, the second surface of the interposer coupled to the package substrate, the first surface of the interposer having at least a first IC die and a second IC die of the plurality of IC dies mounted thereon;
- and
- a lid comprising:
- a first surface;
- and
- a second surface facing away from the first surface, the second surface of the lid having a first region, a second region, a third region and a mounting region, the first region disposed vertically above at least the first IC die and separating the second region from the third region, the second and third regions of the lid extending below the first surface the first IC die and spaced vertically above the first surface of the interposer, at least a portion of the second and third regions of the lid laterally overlapped with the interposer, the mounting region circumscribing first, second and third regions laterally outward of the interposer, the mounting region structurally connected to the package substrate.
Dependencies are inferred from the claim text.