Model-based calibration of an all-digital phase locked loop
AssigneeQUALCOMM Incorporated
InventorsMagnus Olov WIKLUND, Emanuele LOPELLI, Charles WANG
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Abstract
A method of calibrating an All-Digital Phase Locked Loop (ADPLL) includes obtaining a model of the ADPLL and applying an input signal to both the ADPLL and to the model. The ADPLL generates an actual output of the ADPLL, while the model generates a model output. An error between the actual output of the ADPLL and the model output is then sensed. The method also includes generating a calibration value based on the error between the actual output of the ADPLL and the model output, and adjusting a feedforward gain of the ADPLL based on the calibration value.
Claims30
A method of calibrating, by a computing device, an All-Digital Phase Locked Loop (ADPLL), the method comprising:
- obtaining, by the computing device, a model of the ADPLL;
- applying an input signal to the ADPLL to generate an actual output of the ADPLL;
- applying the input signal to the model to generate a model output;
- sensing an error between the actual output of the ADPLL and the model output;
- generating a calibration value based on the error between the actual output of the ADPLL and the model output;
- and
- adjusting a feedforward gain of the ADPLL based on the calibration value.
An apparatus, comprising:
- an All-Digital Phase Locked Loop (ADPLL) configured to generate an actual output of the ADPLL in response to an input signal;
- a model of the ADPLL configured to receive the input signal and to generate a model output in response to the input signal;
- and
- a calibration value generator coupled to the model and to the ADPLL, wherein the calibration value generator is configured to:
- sense an error between the actual output of the ADPLL and the model output, and
- generate a calibration value based on the error between the actual output of the ADPLL and the model output to adjust a feedforward gain of the ADPLL.
An apparatus, comprising:
- means for obtaining a model of an All-Digital Phase Locked Loop (ADPLL);
- means for applying an input signal to the ADPLL to generate an actual output of the ADPLL;
- means for applying the input signal to the model to generate a model output;
- means for sensing an error between the actual output of the ADPLL and the model output;
- means for generating a calibration value based on the error between the actual output of the ADPLL and the model output;
- and
- means for adjusting a feedforward gain of the ADPLL based on the calibration value.
A non-transitory computer-readable medium including program code stored thereon for calibrating an All-Digital Phase Locked Loop (ADPLL), the program code comprising instructions to direct apparatus to:
- obtain a model of the ADPLL;
- apply an input signal to the ADPLL to generate an actual output of the ADPLL;
- apply the input signal to the model to generate a model output;
- sense an error between the actual output of the ADPLL and the model output;
- generate a calibration value based on the error between the actual output of the ADPLL and the model output;
- and
- adjust a feedforward gain of the ADPLL based on the calibration value.
Dependencies are inferred from the claim text.