Low-density parity check decoding
AssigneeLantiq Beteiligungs-GmbH & Co. KG
InventorsRaj Kumar Jain, Ravindra Singh
Life of this patent
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Abstract
A coded signal is received via a physical channel. The coded signal is encoded by a parity check matrix. In some examples, the coded signal is low density parity check-encoded. The coded signal is decoded to determine a result signal. Said decoding alternatingly updates, for each one of a number of iterations, bit node values representing bits of the result signal and check node values representing constrains of the parity check matrix. In some examples, the decoding determines the result signal at a first precision and updates at least partly at a second precision which is lower than the first precision. In further examples, the number of iterations is dynamically adjusted.
Claims20
1-21. (canceled)
A method, comprising:
- receiving a coded signal via a physical channel, the coded signal being encoded by a parity check matrix,
- decoding the coded signal to determine a result signal, wherein said decoding alternatingly updates, for each one of a number of iterations, bit node values representing bits of the result signal and check node values representing constraints of the parity check matrix,
- wherein said decoding determines the result signal at a first precision and updates at least partly at a second precision lower than the first precision.
A method, comprising:
- receiving a coded signal via a physical channel, the coded signal being encoded by a parity check matrix,
- decoding the coded signal to determine a result signal, wherein said decoding alternatingly updates, for each one of a number of iterations, bit node values representing bits of the result signal and check node values representing constraints of the parity check matrix,
- dynamically adjusting the number of iterations for different executions of said decoding.
A device, comprising:
- a receiver configured to receive a coded signal via a physical channel, the coded signal being encoded by a parity check matrix,
- at least one processor configured to decode the coded signal to determine a result signal, wherein said decoding alternatingly updates, for each one of a plurality iterations, bit node values representing bits of the result signal and check node values representing constraints of the parity check matrix,
- wherein said decoding determines the result signal at a first precision and updates at least partly at a second precision lower than the first precision.
A device, comprising:
- a receiver configured to receive a coded signal via a physical channel, the coded signal being encoded by a parity check matrix,
- at least one processor configured to decode the coded signal to determine a result signal, wherein said decoding alternatingly updates, for each one of a plurality iterations, bit node values representing bits of the result signal and check node values representing constraints of the parity check matrix,
- wherein the at least one processor is configured to dynamically adjust the number of iterations for different executions of said decoding.
Dependencies are inferred from the claim text.