US 2017/0366174 A1 · TECHNIQUES FOR DETECTING AND CORRECTING ERRORS ON A RING OSCILLATOR

Abstract

A circuit may include a ring oscillator circuit and monitoring circuitry. The ring oscillator circuit has a group of inverters in a loop, whereby the group of inverters includes first, second, and third output nodes. The monitoring circuitry may monitor for error events in a signal that has passed through the inverters from any one of the first, second, or third output nodes, and may generate first and second monitoring circuitry outputs. The circuit may further include an error correction circuit that produces an error correction output based on the first and second monitoring circuitry outputs. Accordingly, the monitoring circuitry may generate first and second updated monitoring circuitry outputs based on the error correction output. The first and second updated monitoring circuitry outputs may be logically combined using a logic circuit to reset the signal that has passed through the loop.

Claims20

Dependent claims

A circuit comprising:

a ring oscillator circuit comprising inverting logic circuits coupled in a loop, wherein the inverting logic circuits comprise first, second, and third output nodes;
a first error detection circuit comprising a first register circuit, wherein a first input of the first register circuit is coupled to the first output node, and wherein a second input of the first register circuit is coupled to the third output node;
and
a second error detection circuit comprising a second register circuit, wherein a first input of the second register circuit is coupled to the second output node, and wherein a second input of the second register circuit is coupled to the third output node,
wherein the first or second error detection circuit resets a signal that has passed through the inverting logic circuits in response to detecting an error event in the signal from one of the first, second, or third output nodes.

2 more elements

A circuit comprising:

a ring oscillator circuit comprising inverting logic circuits coupled in a loop, wherein the inverting logic circuits comprise first, second, and third output nodes;
a first error detection circuit coupled to the first and third output nodes, wherein the first error detection circuit comprises a first register circuit;
a second error detection circuit coupled to the second and third output nodes, wherein the second error detection circuit comprises a second register circuit;
and
an error correction circuit coupled to outputs of the first and second register circuits, wherein an output of the error correction circuit is coupled to an input of the first register circuit and to an input of the second register circuit,
wherein the first or second error detection circuit resets a signal that has passed through the inverting logic circuits in response to detecting an error event in the signal from one of the first, second, or third output nodes.

3 more elements

Dependencies are inferred from the claim text.

Techniques for detecting and correcting errors on a ring oscillator

Life of this patent

Techniques for detecting and correcting errors on a ring oscillator

Life of this patent

Abstract

Claims20