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US 2017/0366169 A1Published application
Impedance calibration circuit
AssigneeSK hynix Inc.
InventorsSeung Geun BAEK, Jae Il KIM
Life of this patent
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Abstract
An impedance calibration circuit is disclosed, which relates to a technology for improving precision of pad resistance. The impedance calibration circuit includes: a first On Die Termination (ODT) circuit selected by a first selection signal, configured to tune its own resistance using a first code signal, and output a first resistance value to an output terminal; and a second ODT circuit selected by a second selection signal, configured to tune its own resistance using a second code signal, and output a second resistance value to the output terminal.
Claims7
An impedance calibration circuit comprising:
- a plurality of On Die Termination (ODT) circuits tuned by a code signal, configured to output different resistance values to an output terminal;
- a selection unit configured to select any one of the plurality of resistance values using a selection signal;
- a reference voltage selection unit configured to select any one of a plurality of reference voltages using the selection signal;
- a fixed resistor having a fixed resistance value;
- and
- a comparator configured to compare a voltage generated by a ratio of the fixed resistance value of the fixed resistor to a resistance value of the output terminal with an output voltage of the reference voltage selection unit, and output the code signal according to a result of the comparison.
3 more elements
Dependencies are inferred from the claim text.