Power semiconductor device and method of fabricating the same

A method for fabricating a power semiconductor device, the method comprising:

• implanting impurities having a first conductivity type into a first region on a wafer;
• implanting impurities having a second conductivity type, which have a higher doping concentration than that of the impurities having a second conductivity type in the wafer, into a second region on the wafer;
• forming an epitaxial layer on the wafer;
• forming a first trench and a second trench spaced apart from each other in a region including a boundary between the first region and the second region, respectively, while removing part of the epitaxial layer;
• forming a pair of floating regions having a first conductivity type which are spaced apart from each other and surround the bottom surfaces and at least one side surface of the first and second trenches, and at least part of a drift region having a second conductivity type that extends from below the pair of floating regions having a first conductivity type to a region between the pair of floating regions having a first conductivity type, by diffusing the impurities;
• forming a body region having a first conductivity type and a pair of source regions that are spaced apart from each other and disposed adjacent to the first and second trenches in the body region having a first conductivity type, by implanting impurities into a region between the first trench and the second trench;
• and
• forming gate electrodes by lining the inner walls of the first trench and the second trench with an insulating film and filling the first trench and the second trench with a gate electrode material.