Method and Structure for FinFET Comprising Patterned Oxide and Dielectric Layer under Spacer Features

A semiconductor device structure, comprising:

• a substrate having a fin projecting upwardly through an isolation structure over the substrate;
• a gate stack over the isolation structure and engaging the fin;
• a gate spacer on a sidewall of the gate stack and in physical contact with the gate stack;
• a first dielectric layer vertically between the fin and the gate spacer, and in physical contact with the sidewall of the gate stack;
• and
• a second dielectric layer vertically between the first dielectric layer and the gate spacer, and in physical contact with the sidewall of the gate stack, wherein the first and second dielectric layer include different materials.

A semiconductor device, comprising:

• a substrate having a fin projecting upwardly through an isolation structure over the substrate;
• a gate stack over the isolation structure and engaging the fin;
• a gate spacer on a sidewall of the gate stack and in physical contact with the gate stack;
• a first dielectric layer vertically between the fin and the gate spacer and in physical contact with the gate spacer;
• and
• a second dielectric layer vertically between the fin and the gate spacer and in physical contact with the gate spacer, wherein the second dielectric layer is also in physical contact with the gate stack, wherein the first and second dielectric layer include different materials.