Fan-out semiconductor package

A fan-out semiconductor package comprising:

• a first interconnection member having a through-hole;
• a semiconductor chip disposed in the through-hole of the first interconnection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface;
• an encapsulant encapsulating at least portions of the first interconnection member and the inactive surface of the semiconductor chip;
• and
• a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip,
• wherein the first interconnection member and the second interconnection member each include a redistribution layer electrically connected to the connection pads,
• the semiconductor chip includes a passivation layer having openings exposing at least portions of the connection pads,
• the redistribution layer of the second interconnection member is connected to the connection pad through a via,
• a metal layer is disposed between the connection pad and the via, and
• the metal layer covers at least a portion of the connection pad.