US 2017/0365352 A1 · MANAGING REFRESH FOR FLASH MEMORY

Abstract

Systems and method for a host-driven data refresh of a Flash memory include registers provided in the Flash memory for storing various settings related to refresh operations, such as, when to start/stop refreshing, target partitions in the memory, target start/end address ranges for refreshing, refresh algorithms, refresh rate requirements, etc. A host can control the various settings for start/stop refreshing, target partitions in the memory, target start/end address ranges for refreshing, refresh algorithms, through the corresponding registers; and the Flash memory can control various values related to refresh rate requirements through corresponding registers. In this manner, a standard platform or interface is provided within the Flash memory for refresh operations thereof.

Claims30

Dependent claims

A method of performing refresh operations on a Flash memory, the method comprising:

setting one or more refresh registers of the Flash memory with values received from a host;
and
performing refresh operations on the Flash memory based on the values set in the one or more refresh registers.

Dependencies are inferred from the claim text.

Facts

Application

15/615,827Filed 6 Jun 2017

Priority

20 Jun 2016

Published

21 Dec 2017

Term ends

Not estimatedThe source records don’t support an estimate.

Classification5 codes

G11C 16/3431
Disturbance prevention or evaluation; Refreshing of disturbed memory data: circuits or methods to detect disturbed nonvolatile memory cells, e.g.…
G06F 12/0246
Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory: in block erasable memory, e.g. flash memory
G11C 16/3418
Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention: disturbance prevention or evaluation;…
G11C
Static stores

Managing refresh for flash memory

Life of this patent

Managing refresh for flash memory

Life of this patent

Abstract

Claims30