Data-write device for resistance-change memory element

A data-write device for a resistance-change memory element, wherein

• memory cells are disposed in an N×M arrangement (N>1, M>1), one of the memory cells including a resistance-change memory element having two terminals and an NMOS transistor for selecting the memory element,
• in each row from a first to an Nth row, an end of the memory element included in the M memory cells is connected to a first connection node in which a drain node of a first PMOS transistor and to a drain node of a first NMOS transistor are connected via a NMOS transistor for selection for selecting the memory cells disposed in the N×M arrangement for each row,
• in each row, from the first to the Nth row, another end, that is not connected to the memory element of the current path of the NMOS transistor included in the M memory cells is connected to a second connection node in which a drain node of a second PMOS transistor and a the drain node of a second N MOS transistor are connected, and
• the NMOS transistors included in each of the memory cells are transistors for selecting the memory elements for each column,
• the data-write device comprising:
• write means that causes a current to flow through in the order of the first PMOS transistor, the NMOS transistor for selection, the memory element, the NMOS transistor included in the memory cell, and the second NMOS transistor, or in the order of the second PMOS transistor, the NMOS transistor included in the memory cell, the memory element, the NMOS transistor for selection, and the first NMOS transistor in accordance with data to be written, thereby writing the data in the memory element;
• write completion detecting means that monitors a voltage at the first connection node or the second connection node in accordance with the data to be written after data writing in the memory element starts, detects a completion of the writing of the data based on the voltage at the either connection node, and supplies a write completion signal indicating the completion of writing of the data;
• and
• write control means that causes the write means to terminate the writing of the data in the memory element in response to the write completion signal supplied from the write completion detecting means,