Ring oscillator built from sram cells interconnected via standard cell-interface

A method, comprising:

• applying an input signal to a ring oscillator comprising a subgroup of multiple standard-library Static Random Access Memory (SRAM) cells of a memory, disposed on a substrate of an Integrated Circuit (IC) in multiple first layers, wherein access to a respective SRAM cell to read and write data is only through a cell-interface, and wherein circuit interconnections, fabricated in one or more second layers separate from the first layers, interconnect the cell-interfaces of the subgroup of the SRAM cells to form the ring oscillator that comprises a cascade of N stages defined by the interconnected SRAM cells;
• and
• estimating a speed of the SRAM cells of the memory by measuring a frequency of oscillation of the ring oscillator that is initiated by the input signal.

A method for producing an Integrated Circuit (IC), comprising:

• disposing multiple standard-library Static Random Access Memory (SRAM) cells on a substrate of the IC in multiple first layers, wherein access to a respective SRAM cell to read and write data is only through a cell-interface;
• fabricating interconnections in one or more second layers of the IC, separate from the first layers, and interconnecting the cell-interfaces of a subgroup of the SRAM cells to form a ring oscillator that comprises a cascade of N stages defined by the interconnected SRAM cells;
• coupling control logic fabricated in the first layers to the cell-interfaces of the SRAM cells in the subgroup via the circuit interconnections of the second layers, wherein the control logic is designed to apply an input signal to one or more of the cell-interfaces so as to trigger an oscillation of the ring oscillator.