Cell-specific reference generation and sensing
AssigneeMicron Technology, Inc.
InventorsChristopher John Kawamura, Scott James Derner
Life of this patent
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Abstract
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A portion of charge of a memory cell may be captured and, for example, stored using a capacitor or intrinsic capacitance of the memory array that includes the memory cell. The memory cell may be recharged (e.g., re-written). The memory cell may then be read, and a voltage of the memory cell may be compared to a voltage resulting from the captured charge. A logic state of the memory cell may be determined based at least in part on the voltage comparison.
Claims21
An electronic memory device, comprising:
- a first ferroelectric memory cell and a second ferroelectric memory cell;
- a switching component;
- and
- a controller in electronic communication with the first ferroelectric memory cell, wherein the controller is operable to:
- activate a word line and a plate line of the first ferroelectric memory cell to charge a first digit line of the first ferroelectric memory cell;
- activate the switching component coupled with the first digit line and a second digit line of the second ferroelectric memory cell based at least in part on a charge of the first digit line;
- capture a logic state of the first ferroelectric memory cell at the second digit line based at least in part on the activated switching component;
- and
- determine the logic state of the first ferroelectric memory cell based at least in part on the captured logic state.
A method, comprising:
- charging a first digit line of a first ferroelectric memory cell;
- capturing a logic state of the first ferroelectric memory cell represented as a signal voltage that is associated with a second digit line of a second ferroelectric memory cell based at least in part on charging the first digit line;
- establishing an intermediary logic state at the first ferroelectric memory cell based at least in part on capturing the logic state of the first ferroelectric memory cell;
- producing a reference voltage at the first digit line of the first ferroelectric memory cell;
- comparing the signal voltage of the second digit line and the reference voltage of the first digit line;
- and
- determining the logic state of the first ferroelectric memory cell based at least in part on the comparison of the signal voltage and the reference voltage.
A method, comprising:
- storing a logic state of a first ferroelectric memory cell represented as a voltage at an inactive digit line of a second ferroelectric memory cell;
- generating a cell-specific reference voltage at an active digit line of the first ferroelectric memory cell;
- and
- determining the logic state of the first ferroelectric memory cell based at least in part on the voltage of the inactive digit line and the cell-specific reference voltage of the active digit line.
Dependencies are inferred from the claim text.