Fingerprinting of redundant threads using compiler-inserted transformation code
AssigneeAdvanced Micro Devices, Inc.
InventorDaniel I. Lowell
Life of this patent
Estimating the term…
Abstract
A first processing element is configured to execute a first thread and one or more second processing elements are configured to execute one or more second threads that are redundant to the first thread. The first thread and the one or more second threads are to selectively bypass one or more comparisons of results of operations performed by the first thread and the one or more second threads depending on whether an event trigger for the comparison has occurred a configurable number of times since a previous comparison of previously encoded values of the results. In some cases the comparison can be performed based on hashed (or encoded) values of the results of a current operation and one or more previous operations.
Claims20
A method comprising:
- executing redundant threads on corresponding processing elements;
- generating encoded values of results of operations performed by the redundant threads by hashing the results with at least one of a previous encoded value and an initial value, wherein the encoded values are generated in response to the redundant threads executing event triggers for comparisons of the results;
- and
- selectively bypassing at least one comparison of the encoded values depending on whether the event trigger has occurred a configurable number of times since a previous comparison of previously encoded values of the results.
An apparatus comprising:
- a first processing element to execute a first thread;
- and
- at least one second processing element to execute at least one second thread that is redundant to the first thread, wherein the first processing element and the at least one second processing element encoded values of results of operations performed by the first thread and the at least one second thread, respectively, by hashing the results with at least one of a previous encoded value and an initial value, wherein the encoded values are generated in response to the first thread and the at least one second thread executing event triggers for comparisons of the results, and wherein the first processing element and the at least one second processing element are to selectively bypass at least one comparison of the encoded values depending on whether the event trigger has occurred a configurable number of times since a previous comparison of previously encoded values of the results.
A non-transitory computer readable medium embodying a set of executable instructions, the set of executable instructions to manipulate at least one processor element to:
- execute redundant threads on corresponding processing elements;
- generate encoded values of results of operations performed by the redundant threads by hashing the results with at least one of a previous encoded value and an initial value, wherein the encoded values are generated in response to the redundant threads executing event triggers for comparisons of the results;
- and
- selectively bypass at least one comparison of the encoded values depending on whether the event trigger has occurred a configurable number of times since a previous comparison of previously encoded values of the results.
Dependencies are inferred from the claim text.