Semiconductor device

A semiconductor device comprising:

• a semiconductor chip;
• a plurality of IO cells arranged along an edge portion of said semiconductor chip;
• and
• a monitor circuit included in monitor circuit group of a test circuit which is used at the time when the semiconductor device is tested, mounted on said semiconductor chip, wherein
• some elements forming said monitor circuit being arranged in a first corner region of said semiconductor chip,
• remaining elements forming said monitor circuit being arranged in a core region on an inner side of the edge portion of said semiconductor chip, and
• among a plurality of corner regions, said first corner region being located closest to said remaining elements.

A semiconductor device comprising:

• a semiconductor chip;
• a plurality of IO cells arranged along an edge portion of said semiconductor chip and
• a first circuit and a second circuit mounted on said semiconductor chip and connected to each other, wherein
• some elements forming said first circuit being arranged in a first corner region of said semiconductor chip,
• some elements forming said second circuit being arranged in a second corner region of said semiconductor chip, and
• remaining elements forming said first circuit and remaining elements forming said second circuit being arranged in a core region on an inner side of the edge portion of said semiconductor chip, wherein
• the remaining elements forming said first circuit and the remaining elements forming said second circuit are arranged in a first region within said core region,
• among a plurality of corner regions, said first corner region is located closest to said first region, and
• said second corner region is a corner region other than said first corner region in the plurality of corner regions, wherein
• the semiconductor device further comprising an internal voltage monitoring circuit, mounted on said semiconductor chip, for receiving the power supply voltage supplied to the external power supply terminal and monitoring an internal voltage, wherein
• some elements forming said internal voltage monitoring circuit are arranged in a third corner region of said semiconductor chip,
• remaining elements forming said internal voltage monitoring circuit are arranged in a second region within said core region, and
• among a plurality of corner regions, said third corner region is located closest to said second region.

A semiconductor device comprising:

• a semiconductor chip which includes a first corner region, a second corner region, a third corner region and a fourth corner region;
• a plurality of IO cells arranged along an edge portion of the semiconductor chip;
• and
• a power supply IP circuit mounted on the semiconductor chip, wherein
• some elements forming the power supply IP circuit being arranged in the first corner region and the second corner region of the semiconductor chip,
• the remaining elements forming the power supply IP circuit being arranged in a first region within a core region on an inner side of the edge portion of the semiconductor chip, wherein
• the first corner region being located at a position closest to the first region among the four corner regions the first corner region to the fourth corner region.