Apparatus and methods for parallel testing of devices
AssigneeThe United States of America as represented by the Secretary of the Navy
InventorMark Halter
Life of this patent
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AssigneeThe United States of America as represented by the Secretary of the Navy
InventorMark Halter
Estimating the term…
Apparatus and methods for reducing device testing times, such as missile testing times, are disclosed. The apparatus and methods may execute tests or portions of tests in a parallel manner. The apparatus and methods ensure that tests or portions of tests executing in parallel do not interfere with one another. The apparatus and methods may assess the current state of the test environment to confirm whether it is acceptable to advance one or more tests. If the testing environment is not acceptable for a test to continue executing, the apparatus and methods do not allow the test to advance. The testing environment may be monitored by measuring one or more vital signs, where the vital signs may indicate whether it is safe for a particular test to advance. As such, the apparatus and methods provide an efficient way to test devices such as missiles.
A test system comprising:
A method in an electronic device comprising:
A test system comprising:
Dependencies are inferred from the claim text.