Method for controlling bitstream decoding and associated bitstream decoding circuit
AssigneeMStar Semiconductor, Inc.
InventorsYa-Ting Yang, Yi-Shin Tung
Life of this patent
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Abstract
A method for controlling bitstream decoding is provided. The bitstream includes a plurality of frames. The method includes: generating a performance indicator according to a decoding time of at least one previous frame; generating a dropping decision according to the performance indicator, wherein the dropping decision indicates whether it is needed to drop a frame; and determining whether to drop a current frame according to the dropping decision.
Claims14
A method for controlling bitstream decoding, the bitstream comprising a plurality of frames, the method comprising:
- generating a performance indicator according to a decoding time of at least one previous frame;
- generating a dropping decision according to the performance indicator, wherein the dropping decision indicates whether it is needed to drop a frame;
- and
- determining whether to drop a current frame according to the dropping decision.
A bitstream decoding circuit, applied to a bitstream comprising a plurality of frames, the bitstream decoding circuit comprising:
- a performance monitor, generating a performance indicator according to a decoding time of at least one previous frame;
- a dropping decider, generating a dropping decision according to the performance indicator, wherein the dropping decision indicates whether it is needed to drop a frame;
- and
- a decoder, determining whether to drop a current frame according to the dropping decision.
Dependencies are inferred from the claim text.