Semiconductor integrated circuit
AssigneeRenesas Electronics Corporation
InventorTeruaki KANZAKI
Life of this patent
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Abstract
An object of the present invention is to reduce burden on a program for changing an operation mode of an internal circuit in accordance with an internal clock frequency without mounting a large-scale circuit in an LSI in which setting of the frequency of an internal clock can be dynamically changed. In an LSI including an internal clock generation circuit generating an internal clock from a clock source in accordance with a parameter supplied, a register storing frequency information of the clock source, a register storing the parameter, and an internal circuit having a plurality of operation modes, a table circuit controlling the operation mode of the internal circuit in association with the frequency information and the parameter supplied from the registers is provided.
Claims18
A semiconductor integrated circuit comprising:
- an internal clock generation circuit generating an internal clock from a clock source;
- a first register;
- a second register;
- a table circuit;
- and
- an internal circuit having a plurality of operation modes,
- wherein the first register can store first information specifying a relative relation between frequency of the clock source and frequency of the internal clock,
- wherein the second register can store second information indicative of the frequency of the clock source,
- wherein the internal clock generation circuit generates the internal clock on the basis of the first information stored in the first register,
- wherein in the internal circuit, an operation mode is specified on the basis of a control signal supplied, and
- wherein the table circuit can store control information which is output as the control signal in association with the first information and the second information, and outputs corresponding control information as the control signal on the basis of the first information supplied from the first register and the second information supplied from the second register.
A semiconductor integrated circuit comprising:
- an internal clock generation circuit generating an internal clock from a clock source;
- a first register;
- a table circuit;
- and
- an internal circuit having a plurality of operation modes,
- wherein the first register can store first information specifying a relative relation between frequency of the clock source and frequency of the internal clock,
- wherein the first information is information corresponding to the frequency of the clock source,
- wherein the internal clock generation circuit generates the internal clock on the basis of the first information stored in the first register,
- wherein in the internal circuit, an operation mode is specified on the basis of a control signal supplied, and
- wherein the table circuit can store control information which is output as the control signal so as to be associated with the first information, and outputs corresponding control information as the control signal on the basis of the first information supplied from the first register.
The semiconductor integrated circuit according to claim. 15,
- wherein the first register further comprises a second storage circuit holding old first information before new first information is set,
- wherein a third storage circuit holding old control information output from the table circuit before the new first information is set is provided, and
- wherein when the decode result of the new first information is the first decode value indicating a state where setting of the new first information is inhibited, the old first information stored in the second storage circuit is output as an output of the first register, and the old control information stored in the third storage circuit is output as the control information.
Dependencies are inferred from the claim text.