Output circuit with ESD protection
AssigneeNovatek Microelectronics Corp.
InventorsJhih-Siou Cheng, Ju-Lin Huang, Chia-En Wu
Life of this patent
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Abstract
An output circuit with electrostatic discharge (ESD) protection in a semiconductor chip includes a first metal oxide semiconductor (MOS) transistor and a first resistor. The first MOS transistor includes a first terminal coupled to an output pad of the semiconductor chip, a bulk terminal and a gate terminal. The first resistor is coupled between the bulk terminal of the first MOS transistor and a first power supply terminal.
Claims34
An output circuit with electrostatic discharge (ESD) protection in a semiconductor chip, comprising:
- a first metal oxide semiconductor (MOS) transistor, comprising a first terminal coupled to an output pad of the semiconductor chip, a bulk terminal and a gate terminal;
- and
- a first resistor, coupled between the bulk terminal of the first MOS transistor and a first power supply terminal.
An output circuit with electrostatic discharge (ESD) protection in a semiconductor chip, comprising:
- a transmission gate, coupled to an output pad of the semiconductor chip, the transmission gate comprising:
- a first metal oxide semiconductor (MOS) transistor, comprising a first terminal coupled to the output pad, a bulk terminal and a gate terminal;
- and
- a second MOS transistor, comprising a first terminal coupled to the output pad, a bulk terminal and a gate terminal;
- and
- a first resistor, coupled between the bulk terminal of the first MOS transistor and a first power supply terminal.
An output circuit with electrostatic discharge (ESD) protection in a semiconductor chip, comprising:
- an output buffer, coupled to an output pad of the semiconductor chip, the output buffer comprising:
- a first metal oxide semiconductor (MOS) transistor, comprising a first terminal coupled to the output pad, a bulk terminal and a gate terminal;
- and
- a second MOS transistor, comprising a first terminal coupled to the output pad, a bulk terminal and a gate terminal;
- and
- a first resistor, coupled between the bulk terminal of the first MOS transistor and a first power supply terminal.
Dependencies are inferred from the claim text.