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US 2017/0323968 A1Published application
Precise control of vertical transistor gate length
AssigneeInternational Business Machines Corporation
InventorsVeeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert, Junli Wang
Life of this patent
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Abstract
A transistor includes a vertical channel fin directly on a bottom source/drain region. A gate stack is formed on sidewalls of the vertical channel fin. Spacers are formed directly above the gate stack, one above each sidewall of the vertical channel fin. A top source/drain region is formed directly on a top surface of the vertical channel fin, between the spacers.
Claims20
A transistor, comprising:
- a vertical channel fin directly on a bottom source/drain region;
- a gate stack formed on sidewalls of the vertical channel fin;
- spacers formed directly above the gate stack, one above each sidewall of the vertical channel fin;
- and
- a top source/drain region formed directly on a top surface of the vertical channel fin, between the spacers.
2 more elements
A transistor, comprising:
- a vertical channel fin directly on a bottom source/drain region, wherein the vertical channel fin has a base portion and an upper portion and the base portion has a width greater than a width of the upper portion;
- a gate stack formed on sidewalls of the vertical channel fin;
- spacers formed directly above the gate stack, each having an L-shaped cross-section, one above each sidewall of the vertical channel fin;
- and
- a top source/drain region formed directly on a top surface of the vertical channel fin, between the spacers.
2 more elements
A transistor, comprising:
- a vertical channel fin directly on a bottom source/drain region, wherein the vertical channel fin has a base portion and an upper portion and the base portion has a width greater than a width of the upper portion;
- a gate stack formed on sidewalls of the vertical channel fin and on a top surface of the base portion of the channel fin;
- spacers formed directly above the gate stack, each having an L-shaped cross-section, one above each sidewall of the vertical channel fin, wherein the gate stack has a lateral thickness that does not extend beyond the base portion of the channel fin or beyond the spacers;
- and
- a top source/drain region formed directly on a top surface of the vertical channel fin, between the spacers, and on a top surface of a lower portion of the spacers.
2 more elements
Dependencies are inferred from the claim text.