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US 2017/0323950 A1Published application
Semiconductor process
AssigneeUnited Microelectronics Corp.
InventorsPin-Hong Chen, Kuo-Chih Lai, Chia-Chang Hsu, Chun-Chieh Chiu, Li-Han Chen, Min-Chuan Tsai, Kuo-Chin Hung, Wei-Chuan Tsai, Hsin-Fu Huang, Chi-Mao Hsu
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Abstract
A semiconductor process is described. A silicon-phosphorus (SiP) epitaxial layer is formed serving as a source/drain (S/D) region. A crystalline metal silicide layer is formed directly on the SiP epitaxial layer and thus prevents oxidation of the SiP epitaxial layer. A contact plug is formed over the crystalline metal silicide layer.
Claims10
A semiconductor process, comprising:
- forming a silicon-phosphorus (SiP) epitaxial layer serving as a source/drain region;
- forming, directly on the SiP epitaxial layer, a crystalline metal silicide layer that prevents oxidation of the SiP epitaxial layer;
- and
- forming a contact plug over the crystalline metal silicide layer, comprising
- forming a contact hole over the crystalline metal silicide layer;
- forming a barrier metal layer in the contact hole;
- performing a second metal silicidation reaction between the barrier metal layer and the SiP epitaxial layer by heating to form an amorphous metal silicide layer on the crystalline metal silicide layer;
- and
- filling the contact hole with a metal material.
6 more elements
Dependencies are inferred from the claim text.