Three dimensional complementary metal oxide semiconductor carbon nanotube thin film transistor circuit

A metal oxide semiconductor carbon nanotube thin film transistor circuit comprising:

• an insulating substrate;
• a first semiconductor carbon nanotube layer located on the insulating substrate, wherein the first semiconductor carbon nanotube layer is n-type;
• a first drain electrode and a first source electrode, wherein the first drain electrode and the first source electrode are spaced from each other and electrically connected to the first semiconductor carbon nanotube layer;
• a functional dielectric layer located on and covering the first semiconductor carbon nanotube layer, the first drain electrode and the first source electrode;
• a common gate electrode located on the functional dielectric layer and insulated from the first semiconductor carbon nanotube layer, the first source electrode, and the first drain electrode;
• an insulating layer located on and covering the common gate electrode and the functional dielectric layer;
• a second semiconductor carbon nanotube layer located on the insulating layer, wherein the second semiconductor carbon nanotube layer is p-type;
• a second drain electrode and a second source electrode, wherein the second drain electrode and the second source electrode are spaced from each other and electrically connected to the second semiconductor carbon nanotube layer, and the first drain electrode and the second drain electrode are electrically connected with each other.