Buried Channel Deeply Depleted Channel Transistor

A semiconductor device, comprising:

• a semiconductor substrate having a first device region and a second device region of a first conductivity type;
• a first source region and a first drain region of a second conductivity type formed in the first device region;
• a second source region and a second drain region of a second conductivity type formed in the second device region;
• a channel region of the second conductivity type formed in the first device region between the first source region and the first drain region;
• an un-doped channel region in the second device region between the second source region and the second drain region;
• and
• a first screening region of the first conductivity type formed in the first device region below the channel region and between the first source region and the first drain region, a doping density of the first screening region being higher than a doping density of the first device region;
• a second screening region of the first conductivity type formed in the second device region below the un-doped channel region and between the second source region and the second drain region, a doping density of the second screening region being higher than a doping density of the second device region;
• and
• a first gate structure formed on the first device region,
• a second gate structure formed on the second device region wherein the channel region is modified, in response to a bias voltage at the first gate structure, to provide current flow from the first drain region to the first source region;
• and the un-doped channel region is modified, in response to a bias voltage at the second gate structure, to provide current flow from the second drain region to the second source region.