US 2017/0323899 A1 · 3D SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF

Abstract

Provided herein is a semiconductor device including: a channel layer; a data storage layer surrounding the channel layer and extending along the channel layer; interlayer insulating layers surrounding the data storage layer and stacked along the channel layer, wherein the interlayer insulating layers are spaced apart from each other, wherein a conductive area is disposed between the interlayer insulating layers; a conductive pattern disposed in the conductive area and surrounding the data storage layer; buffer patterns disposed between the interlayer insulating layers and the data storage layer and surrounding the data storage layer, wherein each of the buffer patterns includes a densified area, wherein the buffer patterns are separated from each other by the conductive area; and a blocking insulating pattern disposed between the conductive pattern and the data storage layer and surrounding the data storage layer.

Claims14

Dependent claims

A manufacturing method for a semiconductor device, comprising:

alternately stacking first layers and second layers;
forming a hole passing through the first layers and the second layers;
forming a buffer layer over a sidewall of the hole;
forming a first densified area in the buffer layer;
forming a second densified area in a partial area of each of the first layers;
forming a third densified area in a partial area of each of the second layers;
forming a data storage layer over the first densified area;
and
forming a channel layer over the data storage layer.

6 more elements

Dependencies are inferred from the claim text.

Facts

Application

15/279,099Filed 28 Sep 2016

Priority

KR 10-2016-00555484 May 2016

Published

9 Nov 2017

Term ends

Not estimatedThe source records don’t support an estimate.

Classification8 codes

H10B 43/27
With source and drain on different levels, e.g. with sloping channels: the channels comprising vertical portions, e.g. U-shaped channels
H10D 64/037
Of data-storage electrodes: comprising charge-trapping insulators
H10P 14/6546
Of treatments performed after formation of the materials: to change the surface groups of the insulating materials
H10P 14/6516
Characterised by treatments performed before or after the formation of the materials: of treatments performed after formation of the materials

3d semiconductor memory device and manufacturing method thereof

Life of this patent

3d semiconductor memory device and manufacturing method thereof

Life of this patent

Abstract

Claims14