One-time programming cell
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorJhon Jhy LIAW
Life of this patent
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Abstract
A one-time programing cell includes a first metal oxide semiconductor (MOS) structure and a second transistor having a common gate electrode electrically connected to a word line. The first MOS structure has a first gate dielectric layer and the second MOS structure has a second gate dielectric layer. The second gate dielectric layer is thicker than the first gate dielectric layer. Source nodes of the first MOS structure and the second MOS structure are electrically connected, and a drain node of the second MOS structure is electrically connected to a bit line.
Claims20
A one-time programing cell comprising:
- a first metal oxide semiconductor (MOS) structure and a second MOS structure having a common gate electrode electrically connected to a word line,
- wherein the first MOS structure has a first gate dielectric layer and the second MOS structure has a second gate dielectric layer, and the second gate dielectric layer is thicker than the first gate dielectric layer,
- wherein source nodes of the first MOS structure and the second MOS structure are electrically connected,
- wherein a drain node of the second MOS structure is electrically connected to a bit line,
- wherein a drain of the first MOS structure is a floating node,
- wherein the common gate electrode comprises a metal, and
- wherein the first and second gate dielectric layers comprise a high-k material.
A method of programming a one-time programming chip comprising:
- providing a one-time programming chip having a plurality of one-time programming cells, each programming cell comprising:
- a first metal oxide semiconductor (MOS) structure and a second MOS structure having a common gate electrode electrically connected to a word line,
- wherein the first MOS structure has a first gate dielectric layer and the second MOS structure has a second gate dielectric layer, and the second gate dielectric layer is thicker than the first gate dielectric layer,
- wherein source nodes of the first MOS structure and the second MOS structure are electrically connected, wherein a drain node of the second MOS structure is electrically connected to a bit line,
- wherein a drain of the first MOS structure is a floating node,
- wherein the common gate electrode comprises a metal, and
- wherein the first and second gate dielectric layers comprise a high-k material;
- selecting one of the word lines and one of the bit lines;
- and
- applying a first voltage to the selected word line during a program cycle, and applying a second voltage to the selected bit line during the program cycle, thereby causing dielectric breakdown in the first MOS structure,
- wherein the first voltage is higher than the second voltage.
A one-time programing cell comprising:
- a first metal oxide semiconductor (MOS) structure and a second MOS structure having a common gate electrode electrically connected to a word line,
- wherein the first MOS structure has a first gate dielectric layer and the second MOS structure has a second gate dielectric layer, and the second gate dielectric layer is thicker than the first gate dielectric layer,
- wherein source nodes of the first MOS structure and the second MOS structure are electrically connected,
- wherein a drain node of the second MOS structure is electrically connected to a bit line,
- wherein a drain of the first MOS structure is a floating node, and
- wherein the first gate dielectric layer and the second gate dielectric layer are separated from each other.
Dependencies are inferred from the claim text.