Memory device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorMasami ENDO
Life of this patent
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Abstract
A memory device which stores a large amount of data is provided. The memory device includes a first transistor, a second transistor, a third transistor, a first capacitor, a second capacitor, and first to third wirings. The first transistor includes an oxide semiconductor in a channel formation region, the second transistor includes silicon in a channel formation region, and the third transistor includes silicon in a channel formation region. The first capacitor is provided in the same layer as the first transistor. A region of the second capacitor and a region of the first capacitor overlap with each other. The thickness of a dielectric of the second capacitor is preferably larger than the thickness of a dielectric of the first capacitor.
Claims16
A memory device comprising:
- a first transistor;
- a second transistor;
- a first capacitor;
- a second capacitor;
- a conductor;
- and
- a first wiring,
- wherein the conductor has a function of one of a source and a drain of the first transistor,
- wherein the conductor has a function of a first electrode of the first capacitor,
- wherein a second electrode of the first capacitor is electrically connected to the first wiring,
- wherein a first electrode of the second capacitor is electrically connected to the conductor,
- wherein a second electrode of the second capacitor is electrically connected to the first wiring,
- wherein a gate of the second transistor is electrically connected to the conductor,
- wherein the first transistor comprises an oxide semiconductor in a channel formation region,
- wherein the second transistor comprises silicon in a channel formation region, and
- wherein a region of the second capacitor and a region of the first capacitor overlap with each other.
A memory device comprising:
- a first transistor;
- a second transistor;
- a third transistor;
- a first capacitor;
- a second capacitor;
- a conductor;
- a first wiring;
- a second wiring;
- and
- a third wiring,
- wherein the conductor has a function of one of a source and a drain of the first transistor,
- wherein the conductor has a function of a first electrode of the first capacitor,
- wherein a second electrode of the first capacitor is electrically connected to the first wiring,
- wherein a first electrode of the second capacitor is electrically connected to the conductor,
- wherein a second electrode of the second capacitor is electrically connected to the first wiring,
- wherein a gate of the second transistor is electrically connected to the conductor,
- wherein one of a source and a drain of the second transistor is electrically connected to the second wiring through the third transistor,
- wherein the other of the source and the drain of the second transistor is electrically connected to the third wiring,
- wherein the first transistor comprises an oxide semiconductor in a channel formation region,
- wherein the second transistor comprises silicon in a channel formation region,
- wherein the third transistor comprises silicon in a channel formation region, and
- wherein a region of the second capacitor and a region of the first capacitor overlap with each other.
Dependencies are inferred from the claim text.