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US 2017/0323879 A1Published application
Bus driver / line driver
AssigneeAnalog Devices Global
InventorsJohn Twomey, Brian Sweeney, Brian B. Moane
Life of this patent
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Abstract
A bus driver is provided that can withstand over voltages being applied to its output terminal without the protection circuit detracting from the voltage swing that can be provided by the driver. The circuit arrangement also allows transistors having good on state resistance and large tolerance of drain-to-source voltages to be used.
Claims16
A tri-state line driver, comprising:
- first and second transistors coupled in series between an output node and first supply rail, wherein sources of the first and second transistors are operatively connected to each other, and wherein (1) the first supply rail is positive, and the first and second transistors are P-type transistors or (2) the first supply rail is negative or a local ground, and the first and second transistors are N-type transistors;
- and
- a voltage limiter connected (1) between a source of the first transistor and a gate of the first transistor or (2) between a source of the second transistor and a gate of the second transistor, wherein the voltage limiter includes a resistor.
2-5. (canceled)
9-11. (canceled)
A differential tri-state buffer comprising first to sixth transistors, wherein:
- drains of the first and third transistors are connected to a first output node;
- drains of the fifth and sixth transistors are connected to a second output node;
- a drain of the second transistor is connected to a positive supply rail;
- a drain of the fourth transistor is connected to a negative supply rail;
- sources of the first, second and fifth transistors are connected to a first shared node;
- sources of the third, fourth and sixth transistors are connected to a second shared node which is connected to a substrate of a die or to a negative supply rail by way of a high impedance path or a uni-directional current flow device;
- each of the first to sixth transistors is associated with a respective gate-to-source voltage limiting component;
- the first to third transistors are P-type transistors and the fourth to sixth transistors are N-type transistors;
- and
- the first shared node is connected to the positive supply rail by way of a high impedance path or a uni-directional current flow device.
7 more elements
A bus driver, comprising:
- first and second transistors coupled in series between an output node and first supply rail, wherein sources of the first and second transistors are operatively connected to each other;
- and
- a pre-driver circuit including a third transistor and a diode, wherein the diode is arranged in series with the third transistor to block current flow in response to a unipolar threat voltage falling outside of a supply voltage.
An integrated circuit, comprising:
- a bus driver including first and second transistors coupled in series between an output node and first supply rail, wherein sources of the first and second transistors are operatively connected to each other, and the bus driver is to drive in accordance with RS485 or RS232;
- and
- a receiver connected to the output node.
17-19. (canceled)
A tri-state line driver, comprising:
- first and second transistors coupled in series between an output node and first supply rail, wherein:
- sources of the first and second transistors are operatively connected to each other;
- and
- (1) the first supply rail is positive, and the first and second transistors are P-type transistors or (2) the first supply rail is negative or a local ground, and the first and second transistors are N-type transistors;
- and
- the first and second transistors are DMOS transistors;
- and
- the first and second transistors are selected to withstand a drain-source voltage greater than a first value representing a maximum permissible voltage at the output node.
5 more elements
Dependencies are inferred from the claim text.