Semiconductor devices having staggered air gaps

A semiconductor device comprising:

• a substrate;
• an interlayer dielectric layer on the substrate;
• first, second, third and fourth lower conductive lines that are disposed in series in the interlayer dielectric layer;
• an upper conductive line on the third lower conductive line;
• a conductive plug extending from the upper conductive line to the third lower conductive line;
• and
• an air gap provided in a space between the first lower conductive line and the second lower conductive line,
• wherein the interlayer dielectric layer completely fills spaces between the second lower conductive line and the third lower conductive line and between the third lower conductive line and the fourth lower conductive line.

A semiconductor device comprising:

• a substrate including a first region and a second region spaced apart from each other in a first direction;
• lower conductive patterns disposed on the substrate and including first lower conductive patterns on the first region and second lower conductive patterns on the second region;
• a first interlayer dielectric layer disposed between the first lower conductive patterns
• a lower air gap provided in a space between the second lower conductive patterns;
• a middle conductive pattern disposed on the lower conductive pattern in the second region;
• upper conductive patterns including first upper conductive patterns disposed on the first lower conductive patterns and second upper conductive patterns disposed on the second lower conductive patterns;
• and
• an upper air gap provided in a space between the second upper conductive patterns,
• wherein the first interlayer dielectric layer completely fills a space between the first lower conductive patterns.