Semiconductor device and method for manufacturing the same

A method for manufacturing a semiconductor device, comprising:

• a) preparing a lead frame that includes a first chip mounting part supported by a first suspension lead, a second chip mounting part supported by a second suspension lead, a plurality of first leads that are arranged adjacent to the first chip mounting part, and a plurality of second leads that are arranged adjacent to the second chip mounting part;
• b) mounting a first semiconductor chip over the first chip mounting part and mounting a second semiconductor chip over the second chip mounting part;
• c) electrically coupling some of a plurality of pads of the first semiconductor chip and some of a plurality of pads of the second semiconductor chip with a plurality of wires, respectively;
• d) electrically coupling some of the pads of the first semiconductor chip and the first leads with a plurality of wires, respectively;
• e) electrically coupling some of the pads of the second semiconductor chip and the second leads with a plurality of wires, respectively;
• f) forming a sealing body that seals the first and second semiconductor chips, parts of the first and second suspension leads, the first and second chip mounting parts, parts of the first leads and the second leads, and a plurality of wires, and has a first side extending in a first direction and a second side extending in a second direction that is a direction substantially perpendicular to the first direction;
• and
• g) cutting off the first and second suspension leads and the first and second leads from the lead frame,
• wherein in the first semiconductor chip, a plurality of first pads and a plurality of second pads are arranged over its surface,
• wherein in the second semiconductor chip, a plurality of third pads and a plurality of fourth pads are arranged over its surface,
• wherein c) includes:
• c1) coupling the first pads of the first semiconductor chip and the fourth pads of the second semiconductor chip with a plurality of first wires included in a first wire group, respectively;
• and
• c2) coupling the second pads of the first semiconductor chip and the third pads of the second semiconductor chip with a plurality of second wires included in a second wire group, respectively, and
• wherein both in plan view and in the first direction, c1) and c2) are performed so that an inter-wire distance between a wire that is closest to the second wire group in the first wire group and a wire that is closet to the first wire group in the second wire group is larger than any inter-wire distances in the first wire group and in the second wire group.

A method for manufacturing a semiconductor device, comprising:

• a) preparing a lead frame that has a first chip mounting part supported by a first suspension lead, a second chip mounting part supported by a second suspension lead, multiple first leads arranged adjacent to the first chip mounting part, and multiple second leads arranged adjacent to the second chip mounting part;
• b) mounting a first semiconductor chip over the first chip mounting part and mounting a second semiconductor chip over the second chip mounting part;
• c) electrically coupling some of multiple pads of the first semiconductor chip and some of multiple pads of the second semiconductor chip with multiple wires, respectively;
• d) electrically coupling some of the multiple pads of the first semiconductor chip and the multiple first leads with multiple wires, respectively;
• e) electrically coupling some of the multiple pads of the second semiconductor chip and the multiple second leads with multiple wires, respectively;
• f) sealing the first and second semiconductor chips, parts of the first and second suspension leads, the first and second chip mounting parts, parts of the multiple first and multiple second leads, and multiple wires to form a sealing body that includes a first side extending in a first direction and a second side extending in a second direction substantially perpendicular to the first direction;
• and
• g) cutting off the first and second suspension leads and the multiple first and multiple second leads from the lead frame, in which in the first semiconductor chip, multiple first pads and multiple second pads are arranged over its surface, and in the second semiconductor chip, multiple third pads and multiple fourth pads are arranged over its surface,
• wherein c) includes:
• c1) coupling the multiple first pads of the first semiconductor chip and the multiple fourth pads of the second semiconductor chip with multiple first wires included in a first wire group, respectively;
• and
• c2) coupling the multiple second pads of the first semiconductor chip and the multiple third pads of the second semiconductor chip with multiple second wires included in a second wire group, respectively,
• wherein c1) and c2) are performed so that an inter-wire distance between a wire that is closest to the second wire group in the first wire group and a wire that is closest to the first wire group in the second wire group is larger than any inter-wire distances in the first wire group and the second wire group.