Single layer integrated circuit package
AssigneeQdos Flexcircuits Sdn Bhd
InventorsLoke Chew Low, Linhui Yuan
Life of this patent
Estimating the term…
Abstract
An integrated circuit packaging is described, including a plurality of electrical circuits developed using a first patterned conductive layer on a base, wherein an electrical circuit is formed by using a masking material, and an interconnection is developed between the electrical circuits, where the interconnection is disposed on at least one side of the first patterned conductive layer and masking material, in which the interconnection is enclosed with a second masking material to form the integrated circuit packaging.
Claims11
A method of fabricating an integrated circuit packaging, comprising the steps of:
- establishing a base;
- developing a plurality of electrical circuits using a first patterned conductive layer on the base, wherein the electrical circuits are formed by using a masking material;
- and
- developing an interconnection between the electrical circuits, where the interconnection is disposed on at least one side of the first patterned conductive layer and masking material, in which the interconnection is enclosed with a second masking material to form the integrated circuit packaging.
An integrated circuit packaging, comprising:
- a plurality of electrical circuits developed using a first patterned conductive layer on a base, wherein the electrical circuits are formed by using a masking material;
- and
- an interconnection developed between the electrical circuits, where the interconnection is disposed on at least one side of the first patterned conductive layer and masking material, in which the interconnection is enclosed with a second masking material to form the integrated circuit packaging.
Dependencies are inferred from the claim text.