Data input/output circuit and semiconductor memory device having the same

A semiconductor memory device, comprising:

• a memory cell array including a plurality of memory cells;
• a page buffer coupled to bit lines of the memory cell array;
• a column decoder coupled to the page buffer;
• a data input/output circuit coupled to the column decoder and an input/output line, and configured to receive input data from the input/output line to the page buffer and to provide output data from the page buffer to the input/output line;
• and
• control logic configured to control operation of the page buffer, the column decoder, and the data input/output circuit,
• wherein the data input/output circuit comprises:
• a data output unit configured to output the output data received from the page buffer to the input/output line, based on a data output enable signal received from the control logic;
• and
• a data input unit configured to deliver input data received from the input/output line to the page buffer, based on a data input enable signal received from the control logic, and
• wherein the data input unit comprises:
• a signal reception unit coupled to the input/output line and configured to receive the input data from the input/output line, based on the data input enable signal;
• and
• a data delivery unit configured to deliver the input data inputted to the signal reception unit to the page buffer, based on the data input enable signal,
• wherein the signal reception unit outputs a constant voltage value regardless of the output data appearing on the input/output line, based on the data input enable signal having a low-level voltage value during the data output period.