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US 2017/0323671 A1Published application
Control circuit and memory device having the same
AssigneeSK hynix Inc.
InventorBeom Seok HAH
Life of this patent
Estimating the term…
Abstract
In an embodiment, a control circuit may include a command interface, a clock selection signal output circuit, and a clock generating circuit. The command interface may output a selection enable signal in response to a command. The clock selection signal output circuit may output, in response to the selection enable signal, a clock selection signal according to various sub-operations performed in a selected operation. The clock generating circuit may generate main clocks having different periods according the clock selection signal.
Claims20
A control circuit comprising:
- a command interface configured to output a selection enable signal in response to a command;
- a clock selection signal output circuit configured to output, in response to the selection enable signal, a clock selection signal according to various sub-operations performed in a selected operation;
- and
- a clock generating circuit configured to generate main clocks having different periods according the clock selection signal.
1 more element
A memory device comprising:
- memory blocks configured to store data;
- peripheral circuits configured to perform a program, read, or erasure operation on a memory block selected from among the memory blocks;
- and
- a control circuit configured to adjust an operation time of each sub-operation performed in a selected operation while outputting control signals for controlling the peripheral circuits in response to a command.
1 more element
Dependencies are inferred from the claim text.