Apparatus and method of mask permute instructions

A method comprising:

• decoding an instruction into a decoded instruction with a decoder of a processor;
• and
• executing the decoded instruction with an execution unit of the processor to:
• route into an output vector element location an input vector element from one of a plurality of input vector element locations of an input mask vector that are available to source an output vector element for each of a plurality of output vector element locations of an output mask vector, the output vector element and each of said input vector elements being one of first, second, and third vector element sizes for the instruction, and said plurality of input vector element locations corresponding to a contiguous chunk of said input mask vector that is smaller than said input mask vector,
• mask the output mask vector at one of three different levels of granularity that corresponds to the one of the first, second, and third vector element sizes to create a resultant;
• and
• store the resultant in a mask register.

A non-transitory machine readable medium that stores code that when executed by a machine causes the machine to perform a method comprising:

• decoding an instruction into a decoded instruction with a decoder of a processor;
• and
• executing the decoded instruction with an execution unit of the processor to:
• route into an output vector element location an input vector element from one of a plurality of input vector element locations of an input mask vector that are available to source an output vector element for each of a plurality of output vector element locations of an output mask vector, the output vector element and each of said input vector elements being one of first, second, and third vector element sizes for the instruction, and said plurality of input vector element locations corresponding to a contiguous chunk of said input mask vector that is smaller than said input mask vector,
• mask the output mask vector at one of three different levels of granularity that corresponds to the one of the first, second, and third vector element sizes to create a resultant;
• and
• store the resultant in a mask register.