Computing resource with memory resource memory management
AssigneeHewlett Packard Enterprise Development LP
InventorsMitchel E. Wright, Michael R. Krause, Dwight L. Barron, Melvin K. Benedict
Life of this patent
Estimating the term…
Abstract
In an example implementation according to aspects of the present disclosure, a computing system includes a memory resource having a plurality of memory resource regions and a plurality of computing resources. The plurality of computing resources are communicatively coupleable to the memory resource. Each computing node may include a native memory management unit to manage a native memory on the computing resource and a memory resource memory management unit to manage the memory resource region of the memory resource associated with the computing resource.
Claims15
A computing system comprising:
- a memory resource further comprising a plurality of memory resource regions;
- and
- a plurality of computing resources communicatively coupleable to the memory resource, each computing resource further comprising:
- a native memory management unit to manage a native memory on the computing resource, and
- a memory resource memory management unit to manage the memory resource region of the memory resource associated with the computing resource.
A computing resource communicatively coupleable to a memory resource having a plurality of memory resource regions, one of the memory resource regions being associated with the computing resource, the computing resource comprising:
- a processing resource to execute instructions on the computing resource and to read data from and write data to the memory resource region of the memory resource associated with the computing resource;
- a memory resource memory management unit to manage the memory resource region of the memory resource associated with the computing resource;
- and
- an address translation module to perform a memory address translation between a native memory address location of the computing resource and a physical memory address location of the memory resource using an address translation table.
A method comprising:
- generating, by a processing resource of a computing resource, at least one of a data read request to read data from a memory resource communicatively coupleable to the computing resource and a data write request to write data to the memory resource;
- translating, by a memory resource memory management unit of the computing resource, the at least one of the data read request and the data write request between a native memory address location of the computing resource and a physical memory address location of the memory resource;
- and
- performing, by the computing resource, the at least one of the data read request and the data write request.
Dependencies are inferred from the claim text.