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US 2017/0322841 A1Published application
Error handling in transactional buffered memory
AssigneeIntel Corporation
InventorsBrian S. Morris, Bill Nale, Robert G. Blankenship, Eric L. Hendrickson
Life of this patent
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Abstract
Data is sent from a memory buffer device to a host device over a link. An error in the data is determined. A read response cancellation signal is sent to the host device to indicate the error to the host device, where the read response cancellation signal is to be sent subsequent to the data being sent from the memory buffer device to the host device.
Claims20
An apparatus comprising:
- a transmitter to send data from a memory buffer device to a host device over a link;
- an error detector to determine an error in the data;
- and
- transaction cancellation logic to send a read response cancellation signal to the host device to indicate the error to the host device, wherein the read response cancellation signal is to be sent subsequent to the data being sent from the memory buffer device to the host device.
1 more element
An apparatus comprising:
- a buffered memory transmitter to send a read request to a buffer device over a memory access link;
- a buffered memory receiver to receive a read return responsive to the read request;
- and
- routing logic to process the read return for sending to a host device over another interconnect link;
- wherein the buffered memory receiver is further to receive a cancellation signal from the buffer device during the processing of the read return, the cancellation signal is to indicate that the buffer device detected an error in data of the read return, and the apparatus further comprises cancellation logic to cancel the sending of the data to the host device based on the cancellation signal.
2 more elements
A system comprising:
- a first host device;
- a second host device connected to the first host device using a particular link compliant with a general purpose input/output (GPIO) link protocol;
- a buffer device connected to the first host device using a buffered memory link compliant with a memory access link protocol, wherein the buffer device is to:
- send data from a memory buffer device to the first host device over the buffered memory link;
- determine an error in the data;
- and
- send a cancellation signal to the first host device to indicate the error to the host device, wherein the cancellation signal is to be sent subsequent to the data being sent from the buffer device to the first.
4 more elements
Dependencies are inferred from the claim text.