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US 2017/0322612 A1Published application
Graphics processor power management
AssigneeIntel Corporation
InventorsMARC BEUCHAT, JASON TANNER
Life of this patent
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Abstract
One embodiment provides an apparatus. The apparatus includes a graphics processor and power management logic. The graphics processor includes display engine logic and encoder logic. The power management logic is to adjust an operating frequency of the encoder logic based, at least in part, on an encode time duration and based, at least in part, on a frame period.
Claims24
An apparatus comprising:
- a graphics processor comprising display engine logic and encoder logic;
- and
- power management logic to adjust an operating frequency of the encoder logic based, at least in part, on an encode time duration and based, at least in part, on a frame period.
A method comprising:
- coupling, by wireless network circuitry, encoder logic of a graphics processor to a wireless display;
- and
- adjusting, by power management logic, an operating frequency of the encoder logic based, at least in part, on an encode time duration and based, at least in part, on a frame period, the graphics processor further comprising display engine logic.
A computer readable storage device having stored thereon instructions that when executed by one or more processors result in the following operations comprising:
- coupling encoder logic of a graphics processor to a wireless display;
- and
- adjusting an operating frequency of the encoder logic based, at least in part, on an encode time duration and based, at least in part, on a frame period, the graphics processor further comprising display engine logic.
Dependencies are inferred from the claim text.