Mode 7 push-pull structure with external pulse width modulator control
OwnerFei Gong, Meenal Vaidya +1inventors
InventorsFei Gong, Meenal Vaidya, Daniel R. Harshbarger
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Abstract
A circuit, comprising, a first high-side switch and a second high-side switch each receiving a source voltage, a first low-side switch and a second low-side switch, a first application specific integrated circuit (ASIC) connected to the first high-side switch and the first low-side switch, and a second ASIC connected to the second high-side switch and the second low-side switch, wherein the switches are connected to form an H-bridge circuit to generate a drive current, and wherein the first and second ASICs control the switches in a synchronized manner to cause current to flow through a load in one of a first direction and a second direction.
Claims28
A circuit, comprising:
- a first high-side switch and a second high-side switch each receiving a source voltage;
- a first low-side switch and a second low-side switch;
- a first application specific integrated circuit (ASIC) connected to the first high-side switch and the first low-side switch;
- and
- a second ASIC connected to the second high-side switch and the second low-side switch;
- wherein the switches are connected to form an H-bridge circuit to generate a drive current;
- and
- wherein the first and second ASICs control the switches in a synchronized manner to cause current to flow through a load in one of a first direction and a second direction.
A method, comprising:
- generating a plurality of control signals;
- and
- providing a first synchronization signal from a first application-specific integrated circuit (ASIC) to a second ASIC and a second synchronization signal from the second ASIC to the first ASIC for synchronizing the first ASIC with the second ASIC;
- wherein the first ASIC and the second ASIC provide load drive signals to an H-bridge in response to the plurality of control signals and the synchronization signals so that one high-side of the H-bridge and one low-side of the H-bridge operates to drive a load.
A system, comprising:
- a host logic module;
- and
- a programmable load driver module coupled to the host logic module and configured to drive a load, wherein the programmable load driver module comprises an H-bridge circuit and a plurality of application-specific integrated circuits (ASICs);
- wherein the H-bridge circuit is coupled to the plurality of ASICs and comprises two switches on a high-side of the H-bridge and two switches on a low-side of the H-bridge;
- and
- wherein each of the plurality of ASICs has an output, the output from the first ASIC being provided as an input signal to the second ASIC and the output from the second ASIC being provided as an input signal to the first ASIC.
A circuit, comprising:
- a first high-side switch, a second high-side switch and a third high-side switch each receiving a source voltage;
- a first low-side switch, a second low-side switch, and a third low-side switch;
- a first application-specific integrated circuit (ASIC) connected to at least one of the first high-side switch, the second high-side switch and the third high-side switch, and at least one of the first low-side switch, the second low-side switch and the third low-side switch;
- and
- a second ASIC connected to at least one of the first high-side switch, the second high-side switch and the third high-side switch, and at least one of the first low-side switch, the second low-side switch, and the third low-side switch;
- wherein the ASICs control synchronized operation of the switches which are connected to form a three-phase circuit to generate a drive current.
A system, comprising:
- a host logic module;
- and
- a programmable three-phase load driver module coupled to the host logic module and configured to drive a load, wherein the programmable three-phase load driver module comprises a three-phase power circuit and a plurality of application-specific integrated circuits (ASICs);
- wherein the three-phase power circuit is coupled to the plurality of ASICs and comprises three MOS switches on a high-side of the three-phase power circuit and three MOS switches on a low-side of the three-phase power circuit;
- and
- wherein each of the plurality of ASICs has an output, the output from the first ASIC being provided as an input signal to the second ASIC and the third ASIC, the output from the second ASIC being provided as an input signal to the first ASIC and the third ASIC, and the output from the third ASIC being provided as an input signal to the first ASIC and the second ASIC.
A method, comprising:
- generating a plurality of control signals;
- and
- providing a first synchronization signal from a first application-specific integrated circuit (ASIC) to a second ASIC and a third ASIC, a second synchronization signal from the second ASIC to the first ASIC and the third ASIC, and a third synchronization signal from the third ASIC to the first ASIC and the second ASIC for synchronizing the first ASIC, the second ASIC, and the third ASIC;
- wherein the first ASIC, the second ASIC, and the third ASIC provide load drive signals to a three-phase circuit in response to the plurality of control signals and the synchronization signals so that one high-side of the three-phase circuit and one low-side of the three-phase circuit operates to drive a load.
Dependencies are inferred from the claim text.