Clock spine with tap points

A method for operating an integrated circuit, comprising:

• conducting a clocking signal on a clock spine having a plurality of taps points, wherein the plurality of tap points are distributed unevenly on the clock spine based on clock loads;
• buffering the clocking signal at each of the plurality of tap points;
• and
• relaying the clocking signal to a plurality of clock loads from the plurality of tap points, wherein the plurality of clock loads is arranged as a plurality of clusters, and wherein one of the plurality of tap points is a nearest point on the clock spine to a center of one of the plurality of clusters.

An apparatus, comprising:

• means for conducting a clocking signal, the means for conducting having a plurality of taps points, wherein the plurality of tap points are distributed unevenly on the means for conducting based on clock loads;
• means for buffering the clocking signal at the plurality of tap points;
• and
• a plurality of clock loads arranged as a plurality of clusters, wherein the means for buffering relays the clocking signal to the plurality of clock loads and one of the plurality of tap points is a nearest point on the means for conducting to a center of one of the plurality of clusters.

A method for manufacturing an integrated circuit, comprising:

• forming a clock spine to conduct a clocking signal, the clock spine having a plurality of taps points, wherein the plurality of tap points are distributed unevenly on the clock spine based on clock loads;
• forming a plurality of clock buffers, each of the plurality of clock buffers being connected to a corresponding one of the plurality of tap points;
• and
• forming a plurality of clock loads arranged as a plurality of clusters, wherein the plurality of clock buffers relays the clocking signal to the plurality of clock loads, and one of the plurality of tap points is a nearest point on the clock spine to a center of one of the plurality of clusters.