Secure storage on external memory
AssigneeNuvoton Technology Corporation
InventorMoshe Alon
Life of this patent
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Abstract
A cryptography apparatus includes multiple multiplication units and logic circuitry. The multiplication units are arranged in two or more multiplication levels, and are configured to operate in accordance with Galois-Field (GF) arithmetic over respective Galois fields. The logic circuitry is configured to receive input data whose word-size exceeds a maximal input word-size among the multiplication units, to hold a cryptographic key including multiple sub-keys whose number does not exceed a number of the multiplication units, and to perform a cryptographic operation on the input data by applying the sub-keys to the multiplication units.
Claims25
A cryptography apparatus, comprising:
- multiple multiplication units, which are arranged in two or more multiplication levels, and which are configured to operate in accordance with Galois-Field (GF) arithmetic over respective Galois fields;
- and
- logic circuitry, which is configured to:
- receive input data, which is associated with a memory address and whose word-size exceeds a maximal input word-size among the multiplication units;
- generate a random cryptographic key, which depends on the memory address and which comprises multiple sub-keys whose number does not exceed a number of the multiplication units;
- and
- perform a cryptographic operation on the input data by applying the sub-keys to the multiplication units.
A method for cryptography, comprising:
- receiving input data, which is associated with a memory address and whose word-size exceeds a maximal input word-size among multiple multiplication units, which are arranged in two or more multiplication levels, and which are configured to operate in accordance with Galois-Field (GF) arithmetic over respective Galois fields;
- generating a random cryptographic key, which depends on the memory address and which comprises multiple sub-keys whose number does not exceed a number of the multiplication units;
- and
- performing a cryptographic operation on the input data by applying the sub-keys to the multiplication units.
A computing system, comprising:
- an external memory;
- and
- a controller, which comprises multiple multiplication units, which are arranged in two or more multiplication levels, and which are configured to operate in accordance with Galois-Field (GF) arithmetic over respective Galois fields, wherein the controller is configured to:
- receive input data, which is associated with a memory address and whose word-size exceeds a maximal input word-size among the multiplication units;
- generate a random cryptographic key, which depends on the memory address and which comprises multiple sub-keys whose number does not exceed a number of the multiplication units;
- and
- perform a cryptographic operation on the input data by applying the sub-keys to the multiplication units.
Dependencies are inferred from the claim text.